Job Description
Senior RTL Design Engineer - Accelerator Startups - San Francisco Bay Area
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I'm working closely with a number of stealth startups in the Bay Area currently looking for senior RTL design engineers to work on next-level AI accelerator technology. Holding lots of responsibility within a small but high-calibre team of industry leaders, you'll own your own design work alongside collaborating closely with physical design, verification and leadership teams.
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What you need
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- Strong experience across ASIC and SoC design principles
- A broad understanding of the wider elements of chip design.
- Ready to get hands-on in a fast-moving and high-ownership startup environment
- Prior work with AI/LLM systems and memory/fabric interconnect is a plus, alongside familiarity with high-speed protocols.
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What you'll be doing
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- Work closely with industry leaders picked from the top semiconductor companies
- Lead projects end-to-end and work cross-functionally across the full chip lifecycle
- Develop into a role with leadership and equity upside as the company grows
- Rather than just supporting already dominant systems, you'll be central in democratising and innovating the next generation of technology
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Make sure you apply today as interviews are already being scheduled!